

/*******************************************************************************
********************************************************************************
/*
 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
 */

/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */
********************************************************************************
*  WARNING: THIS FILE IS AUTOMATICALLY GENERATED FROM XML
*  DO NOT MODIFY THIS FILE DIRECTLY.
*  TO REGENERATE, CD TO: piano/chip/scripts AND RUN: ./build_io_map
*  PLEASE ALSO CHECK IN THE MATCHING piano/chip/include/chip_io_map.h FILE
*******************************************************************************/

#define REGS_ICOLL_BASE       (REGS_BASE + 0x00000000)
#define REGS_APBH_BASE        (REGS_BASE + 0x00004000)
#define REGS_ECC8_BASE        (REGS_BASE + 0x00008000)
#define REGS_GPMI_BASE        (REGS_BASE + 0x0000C000)
#define REGS_SSP1_BASE        (REGS_BASE + 0x00010000)
#define REGS_PINCTRL_BASE     (REGS_BASE + 0x00018000)
#define REGS_DIGCTL_BASE      (REGS_BASE + 0x0001C000)
#define REGS_EMI_BASE         (REGS_BASE + 0x00020000)
#define REGS_APBX_BASE        (REGS_BASE + 0x00024000)
#define REGS_DCP_BASE         (REGS_BASE + 0x00028000)
#define REGS_OCOTP_BASE       (REGS_BASE + 0x0002C000)
#define REGS_LCDIF_BASE       (REGS_BASE + 0x00030000)
#define REGS_SSP2_BASE        (REGS_BASE + 0x00034000)
#define REGS_CLKCTRL_BASE     (REGS_BASE + 0x00040000)
#define REGS_SAIF1_BASE       (REGS_BASE + 0x00042000)
#define REGS_POWER_BASE       (REGS_BASE + 0x00044000)
#define REGS_SAIF2_BASE       (REGS_BASE + 0x00046000)
#define REGS_AUDIOOUT_BASE    (REGS_BASE + 0x00048000)
#define REGS_AUDIOIN_BASE     (REGS_BASE + 0x0004C000)
#define REGS_LRADC_BASE       (REGS_BASE + 0x00050000)
#define REGS_SPDIF_BASE       (REGS_BASE + 0x00054000)
#define REGS_I2C_BASE         (REGS_BASE + 0x00058000)
#define REGS_RTC_BASE         (REGS_BASE + 0x0005C000)
#define REGS_PWM_BASE         (REGS_BASE + 0x00064000)
#define REGS_TIMROT_BASE      (REGS_BASE + 0x00068000)
#define REGS_UARTAPP_BASE     (REGS_BASE + 0x0006C000)
#define REGS_UARTDBG_BASE     (REGS_BASE + 0x00070000)
#define REGS_DRI_BASE         (REGS_BASE + 0x00074000)
#define REGS_IR_BASE          (REGS_BASE + 0x00078000)
#define REGS_USBPHY_BASE      (REGS_BASE + 0x0007C000)
#define REGS_USBCTRL_BASE     (REGS_BASE + 0x00080000)
#define REGS_DRAM_BASE        (REGS_BASE + 0x000E0000)
